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Things that you might like us to do for you…
- Integrate Xyce with your favorite digital simulator
- Let Xyce read your favorite analog net-list
- Replace OpenAccess with (say) Redis
- Automate Verilog-AMS boundary conversion
- CDC error detection with your UVM test-bench
- Automated model generation for reuse of UVM test-benches to give better results
- DVFS verification (actual Voltage and current)
- Logic modeling with body-biasing (FDSOI)
- Extremely large mixed-simulator (co sim) simulation, e.g. full AV, Smart Grid
- Integrate electronic simulation with physical simulation (robotics)
- Embedded processor virtualization for debug (ARM)
- Digital twinning of your design (for early software development)
