Blog

The bright new world of AI has arrived rather quickly as a byproduct of Big-Data statistical computing from folks like Google trying to sift through the world’s data. The bulk of it is sparse-matrix math, which is something I did in college decades ago. My first encounter with using that math was building a steady-state…

In case you have not noticed, parallel buses have been going away, to be replaced by SERDES – USB, SATA, PCIe – and only DDR remains, and the writing is on the wall for DDR as we move to doing in-memory computing for lower power and latency. Something that has always been serial is Ethernet,…

Here are some anti-patterns that won’t help if you want to be a tech company… Hiring for fit, not skills FAANG companies love to do this, it means everybody gets on well but nobody really knows how to do new stuff. That’s fine if you are a services company that needs to scale, but not…

I’ve recently been looking at building a robot for EV charging, here are a couple of examples – These robots fail because the designers are trying to make a robot do something the way a human would do it. Robots can be any size and shape, they can have multiple limbs or none, and they…

For as long as people have used Verilog, dealing with Xs in models has been a problem – The root of that was wanting a simple signal model that wouldn’t take up much memory in the early Verilog simulators – cache performance being a major determinant of simulation speed, so packing 0,1,X,Z into 2-bits worked…

[A different perspective to http://parallel.cc] So the genesis of WT was the realization (after working on it for a year or more) that the maximum speed up on SMP for VCS was going to be ~4x. Two decades on Synopsys don’t seem to be doing much better than that (at 5x)- https://news.synopsys.com/2016-03-24-Synopsys-Unveils-Breakthrough-Parallel-Simulation-Performance-Technology-for-VCS (the gate level…

A while back I worked out what the minimum extensions to C++ would be for making it easy to model hardware, you can find that at http://parallel.cc. In a similar vein I wondered what the minimum extension to an analog simulator would be to support mixed-signal simulation, and that one turns out to be programmable…

[In case you feel I’m being hard on VCS-AMS, the same failings apply to offerings from other major EDA vendors] Digital-on-top AMS simulators don’t work For a mixed signal simulator to work properly all the wiring needs to be analog so that all analog things attached to a wire can be computed together. Digital-on-top simulators…

Most computer scientists are familiar with Amdahl’s Law, boiled down it says the fastest your program can run is determined by the slowest of the parallel threads (assuming you can decompose it into parallel threads). However, it says little about the decomposition, and assumes that your threads have equal resources (assuming an SMP environment). If…